CMOS tagged posts

Scalable Method to Manufacture Thin Film Transistors achieves Ultraclean Interface

Scalable method to manufacture thin film transistors achieves ultra-clean interface for high performance, low-voltage device ope
Microchip containing thin film transistors having record sub-threshold slope, made using the in situ atomic layer deposition process. Credit: Silvia Cardarelli, Michigan ECE

Prof. Becky Peterson at the University of Michigan leads a team that has developed a scalable, manufacturable method for developing thin film transistors (TFTs) that operate at the lowest possible voltage. This is particularly important for TFT integration with today’s silicon complementary metal-oxide semiconductors (CMOS), which are used in the vast majority of integrated circuits.

“We’re essentially developing a less complicated device that operates at lower voltage,” said ECE Ph.D. student Tonglin (Tanya) Newsom, who is first author on the paper...

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Building Energy-Efficient Computing Platforms

Building energy-efficient computing platforms
Images of the electronic platform used in the studies. Credit: CeNSE, IISc

The massive growth of data centers that consume enormous amounts of energy has contributed significantly to power shortages worldwide. With rising demand for faster and more intelligent computers and devices, there is a pressing need to develop alternatives to traditional electronic components that will make these devices more energy-efficient.

In two recent studies, researchers at the Centre for Nano Science and Engineering (CeNSE), IISc, report the development of a highly energy-efficient computing platform that offers promise in building next-generation electronic devices.

Instead of using complementary metal-oxide semiconductors (CMOS) which are the building blocks of most electronic circuits today, th...

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Researchers realize Gallium Nitride-based Complementary Logic Integrated Circuits

Researchers realize Gallium nitride (GaN)-based complementary logic integrated circuits
(a) Schematic view of the device structure of the GaN complementary logic inverter developed at HKUST; (b) corresponding circuit diagram; (c) perspective view of a true-color photo of the 15-stage GaN complementary ring oscillator fabricated in HKUST. (d) Cross-coupled plot of voltage transfer curves at different temperatures, and (e) static power dissipation with respect to different supply voltage and input voltage of the reported inverter. The inverter is very stable up to 200 °C with substantially large noise margins. (f) Oscillating waveform and the corresponding power spectrum of the reported ring oscillator. Credit: Zheng et al. (Springer Nature).

Most integrated circuits (ICs) and electronic components developed to date are based on silicon metal-oxide-semiconductor (CMOS) tec...

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Brain-inspired highly scalable Neuromorphic Hardware

Single transistor neurons and synapses fabricated using a standard silicon CMOS process. They are co-integrated on the same 8-inch wafer

KAIST researchers fabricated a brain-inspired highly scalable neuromorphic hardware by co-integrating single transistor neurons and synapses. Using standard silicon complementary metal-oxide-semiconductor (CMOS) technology, the neuromorphic hardware is expected to reduce chip cost and simplify fabrication procedures.

The research team led by Yang-Kyu Choi and Sung-Yool Choi produced a neurons and synapses based on single transistor for highly scalable neuromorphic hardware and showed the ability to recognize text and face images. This research was featured in Science Advances on August 4.

Neuromorphic hardware has attracted a great deal of atten...

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