Ultraclean Interface tagged posts

Scalable Method to Manufacture Thin Film Transistors achieves Ultraclean Interface

Scalable method to manufacture thin film transistors achieves ultra-clean interface for high performance, low-voltage device ope
Microchip containing thin film transistors having record sub-threshold slope, made using the in situ atomic layer deposition process. Credit: Silvia Cardarelli, Michigan ECE

Prof. Becky Peterson at the University of Michigan leads a team that has developed a scalable, manufacturable method for developing thin film transistors (TFTs) that operate at the lowest possible voltage. This is particularly important for TFT integration with today’s silicon complementary metal-oxide semiconductors (CMOS), which are used in the vast majority of integrated circuits.

“We’re essentially developing a less complicated device that operates at lower voltage,” said ECE Ph.D. student Tonglin (Tanya) Newsom, who is first author on the paper...

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