Quantum computers, systems that process information leveraging quantum mechanical effects, could outperform classical computers on some advanced tasks. These systems rely on qubits, the fundamental units of quantum information, that become linked via an effect known as quantum entanglement and share a unified quantum state.
Qubits are known to be highly sensitive to slight changes or disturbances in their surrounding environment, also referred to as noise. Noise can prompt them to lose quantum information via a process called decoherence, which in turn leads to errors.
In recent years, quantum scientists and engineers have introduced various approaches aimed at mitigating or correcting quantum errors, with the goal of realizing fault-tolerant quantum computing. Some of these approaches rely on so-called erasure qubits, qubits whose errors are easier to detect and locate in real time.
Researchers in Shenzhen, China recently introduced a new promising superconductor-based quantum processor that encodes the logical qubit across two physical superconducting qubits. Their system, outlined in a paper published in Nature Physics, was found to enable the realization of high-fidelity multi-qubit states and logical gates.
“Our work originated from a broader effort to make quantum error correction more practical and scalable,” Youpeng Zhong, co-senior author of the paper, told Phys.org.
“While significant progress has been made in recent years, a key bottleneck remains the large resource overhead required to encode and manipulate logical qubits. This has motivated increasing interest in alternative approaches that can reduce this overhead at the hardware level. One particularly promising direction is the use of erasure qubits, where dominant errors can be directly detected and labeled.”
Dual-rail encoding is a promising approach to realize the idea of erasure qubits in superconducting circuits. Essentially, two physical superconducting qubits are used to represent a single logical qubit.
Energy-loss-related errors are detected by converting energy relaxation into events that the system can immediately flag, so that they can be fixed or discarded.
Building a processor with superconducting dual-rail erasure qubits
Past studies have shown that dual-rail architectures can extend coherence times, reducing errors arising during single-qubit operations. Yet their potential for performing high-fidelity multi-qubit logical operations had not yet been conclusively demonstrated.
“An essential ingredient for scalable quantum computing, however, was still missing: the ability to perform high-fidelity multi-qubit logical operations and generate logical entangled states within this framework,” said Zhong.
“From both a quantum error correction and a quantum algorithm perspective, multi-qubit logical entanglement is a key requirement, but it is also technically challenging because it requires maintaining error detectability while engineering coherent interactions between protected logical subspaces.”
Zhong and his colleagues set out to develop a new superconducting dual-rail architecture that incorporates erasure qubits and could thus detect and mitigate errors. They then tried to apply this architecture to realize two-qubit logic gates and generate two different types of multi-qubit entangled states.
“We wanted to show that dual-rail erasure qubits can go beyond single-qubit protection and support coherent, high-fidelity multi-qubit operations,” said Zhong.
“This represents an important step toward scalable quantum error correction, as it demonstrates that logical qubits can be scaled beyond the single-qubit level, showing not only improved coherence, but also the ability to generate high-fidelity entanglement across multiple logical qubits.”
The superconducting quantum processor designed by the authors consists of pairs of transmon qubits arranged in a dual-rail configuration. Each logical qubit is encoded across two physical qubits, so that specific errors, particularly those associated with a loss of energy, can be easily detected by the nearby “helper” (i.e., ancilla) qubit.
“This setup allows us to identify when an error occurs and selectively disregard those runs, effectively biasing the system toward error-free logical operations,” explained Zhong.
“To generate entanglement between multiple logical qubits, we engineered tunable couplings between specific physical qubits of different dual-rail pairs. By carefully adjusting these couplings and the relative qubit frequencies, we could coherently exchange quantum information between logical qubits while preserving the error-detectable structure.”
With their proposed architecture, the researchers were able to implement high-fidelity two-qubit gates and create two different entangled states within the “protected” logical qubits. These two states included a two-qubit logical Bell state, a state in which two qubits are perfectly linked, so that reading one offers information about the other, as well as a three-qubit logical Greenberger-Horne-Zeilinger (GHZ) state, a maximally entangled state.
“Throughout the experiments, mid-circuit measurements of the ancilla qubits allowed us to detect and filter out erasure events, which significantly extended the effective coherence of the logical qubits,” said Zhong.
“In short, we combined a dual-rail encoding scheme with tunable interactions and active error detection to demonstrate multi-qubit logical entanglement under error-biased protection.”
This study offers one of the first demonstrations of logical entanglement between two or more dual-rail superconducting qubits. The team’s architecture could be adapted and improved in future studies to realize other entangled states that link an even greater number of qubits.
“We show that dual-rail logical qubits can serve not only as long-lived quantum memories, but also as resources for high-fidelity logical two-qubit gates and multi-qubit entangled states,” said Zhong.
“Crucially, this is achieved together with erasure detection, which converts a dominant physical error into a detectable event, an important advantage for quantum error correction. The broader implication is that this approach offers a practical path toward more resource-efficient, fault-tolerant quantum computing.”
A new path toward fault-tolerant quantum computing
This study highlights the potential of erasure qubits and dual-rail superconducting architectures for the detection and correction of quantum errors. In the future, it could contribute to the development of reliable and fault-tolerant quantum computers, ultimately paving the way for their widespread deployment.
“We see several promising next steps for this line of research,” said Zhong. “In the short term, a major priority is to improve the performance of the logical two-qubit gates. In the present work, their fidelity is mainly limited by coupler-induced decoherence, so we are focusing on better coupler designs and more refined control strategies.
“Based on our analysis, there is a realistic path to pushing the logical two-qubit gate fidelity to above 99.9%, which would make this platform substantially more attractive for large-scale fault-tolerant applications.”
As part of their next studies, Zhong and his colleagues also plan to scale up the architecture introduced in their paper. Specifically, they would like to shift from a system that encodes a few logical qubits to larger processors that can encode numerous qubits at once.
These larger systems would allow them to test more sophisticated quantum error-correction protocols and run increasingly intricate logical circuits. In addition, they would help to assess the performance of dual-rail erasure qubits in more realistic settings and when performing more complex operations.
“We are also interested in developing fast active-reset and recovery methods,” added Zhong. “In our system, when an erasure event is detected, the state leaves the logical subspace.
“For future large-scale devices, it will be important not only to detect these events, but also to quickly reset and reinitialize the affected qubits so the computation can continue with high efficiency. We expect this capability to be an important ingredient for making erasure-based superconducting processors more practical.” https://phys.org/news/2026-03-dual-rail-superconducting-qubits-generate.html
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